A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels

A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels

The scrutiny of the class of Reed-Solomon (RS) based quasi-cyclic (QC) low-density parity-check (LDPC) codes has inspired the authors to propose a memory efficient mirror-paradigm (MP) RS-based QC-LDPC code by exploiting the geometrical properties from the RS-based QC-LDPC nomenclature. Without any...

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Main Authors: Lim, Melvin Heng Li, Goh, Wang Ling, Qin, Zhiliang
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2013
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:https://hdl.handle.net/10356/103596
http://hdl.handle.net/10220/16899
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1035962020-03-07T13:24:51Z A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels Lim, Melvin Heng Li Goh, Wang Ling Qin, Zhiliang School of Electrical and Electronic Engineering International Symposium on Intelligent Signal Processing and Communications Systems (2012 : Taipei, Taiwan) DRNTU::Engineering::Electrical and electronic engineering The scrutiny of the class of Reed-Solomon (RS) based quasi-cyclic (QC) low-density parity-check (LDPC) codes has inspired the authors to propose a memory efficient mirror-paradigm (MP) RS-based QC-LDPC code by exploiting the geometrical properties from the RS-based QC-LDPC nomenclature. Without any loss in performance, the proposed MPRS-based QC-LDPC code delivers discernible memory savings that address the concerns of hefty H-matrices associated to lengthy codewords for non-volatile memory (NVM) applications. Besides, the MPRS-based QC-LDPC codes are not confined to any particular hardware implementation and are compatible with various decoder architectures to complement other optimization schemes. 2013-10-25T03:07:42Z 2019-12-06T21:16:05Z 2013-10-25T03:07:42Z 2019-12-06T21:16:05Z 2012 2012 Conference Paper Lim, M. H. L., Goh, W. L., & Qin, Z. (2012). A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels. 2012 International Symposium on Intelligent Signal Processing and Communications Systems, 760-765. https://hdl.handle.net/10356/103596 http://hdl.handle.net/10220/16899 10.1109/ISPACS.2012.6473593 en © 2012 IEEE
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Lim, Melvin Heng Li
Goh, Wang Ling
Qin, Zhiliang
A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
description The scrutiny of the class of Reed-Solomon (RS) based quasi-cyclic (QC) low-density parity-check (LDPC) codes has inspired the authors to propose a memory efficient mirror-paradigm (MP) RS-based QC-LDPC code by exploiting the geometrical properties from the RS-based QC-LDPC nomenclature. Without any loss in performance, the proposed MPRS-based QC-LDPC code delivers discernible memory savings that address the concerns of hefty H-matrices associated to lengthy codewords for non-volatile memory (NVM) applications. Besides, the MPRS-based QC-LDPC codes are not confined to any particular hardware implementation and are compatible with various decoder architectures to complement other optimization schemes.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Lim, Melvin Heng Li
Goh, Wang Ling
Qin, Zhiliang
format Conference or Workshop Item
author Lim, Melvin Heng Li
Goh, Wang Ling
Qin, Zhiliang
author_sort Lim, Melvin Heng Li
title A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
title_short A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
title_full A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
title_fullStr A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
title_full_unstemmed A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels
title_sort novel fpga implementation of mirror-paradigm rs-based qc-ldpc decoder for nvm channels
publishDate 2013
url https://hdl.handle.net/10356/103596
http://hdl.handle.net/10220/16899
_version_ 1681045415055589376

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