A 0.4V 7T SRAM with write through virtual ground and ultra-fine grain power gating switches
This paper presents a 7T near-threshold SRAM with design techniques for improving cell stability and energy efficiency. The proposed write through virtual ground (WTVG) scheme decreases the period of write disturbance by 6.1×. A PVT tracking sensing scheme is presented to track variation and sense s...
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| Main Authors: | , , , |
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| 其他作者: | |
| 格式: | Conference or Workshop Item |
| 語言: | English |
| 出版: |
2013
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/105330 http://hdl.handle.net/10220/16579 http://dx.doi.org/10.1109/ISCAS.2013.6572517 |
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| 機構: | Nanyang Technological University |
| 語言: | English |
| 總結: | This paper presents a 7T near-threshold SRAM with design techniques for improving cell stability and energy efficiency. The proposed write through virtual ground (WTVG) scheme decreases the period of write disturbance by 6.1×. A PVT tracking sensing scheme is presented to track variation and sense small RBL swing. The ultra-fine grain power gating switches are implemented to minimize the redundant leakage caused by the storage of garbage data. The leakage suppression of 52% is achieved after the initial power-up. A 16 kb SRAM test chip was fabricated in a 65nm CMOS technology and showed the minimum energy of 2.01 pJ at 0.4 V. |
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