An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS

This brief presents an ultra-low voltage level shifter (LS) with fast and energy-efficient voltage conversion from the deep subthreshold region to the superthreshold region. The proposed LS achieves better performance and increased energy efficiency by addressing the reduced swing and the slow fall...

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Main Authors:	Le, Van Loi, Kim, Tony Tae-Hyoung
Other Authors:	School of Electrical and Electronic Engineering
Format:	Article
Language:	English
Published:	2019
Subjects:	Current Mirror Level Shifter DRNTU::Engineering::Electrical and electronic engineering
Online Access:	https://hdl.handle.net/10356/105835 http://hdl.handle.net/10220/48774 http://dx.doi.org/10.1109/TCSII.2018.2820155
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Institution:	Nanyang Technological University
Language:	English

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spelling	sg-ntu-dr.10356-1058352019-12-06T21:58:58Z An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS Le, Van Loi Kim, Tony Tae-Hyoung School of Electrical and Electronic Engineering Current Mirror Level Shifter DRNTU::Engineering::Electrical and electronic engineering This brief presents an ultra-low voltage level shifter (LS) with fast and energy-efficient voltage conversion from the deep subthreshold region to the superthreshold region. The proposed LS achieves better performance and increased energy efficiency by addressing the reduced swing and the slow fall transition issues in prior arts. A novel reduced-swing buffer design is proposed to attain lower standby power consumption while a pass transistor is used for improving the speed of the fall transition. The proposed LS consists of only 11 transistors occupying 7.45 μm 2 , which obtains the smallest area among the state-of-the-art ultra-low voltage LSs. Measurement results from a test chip fabricated in 65-nm CMOS technology demonstrate that the proposed LS shows the maximum leakage and speed improvements of 16.3× and 2.7× compared to the Wilson current mirror LS. The proposed LS also accomplishes the maximum switching energy reduction of 8.5× and can convert deep subthreshold voltage as low as 100 mV to the superthreshold voltage of 1.2 V. Accepted version 2019-06-14T07:25:33Z 2019-12-06T21:58:58Z 2019-06-14T07:25:33Z 2019-12-06T21:58:58Z 2018 Journal Article Le, V. L., & Kim, T. T.-H. (2018). An Area and Energy Efficient Ultra-Low Voltage Level Shifter With Pass Transistor and Reduced-Swing Output Buffer in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 65(5), 607-611. doi:10.1109/TCSII.2018.2820155 1549-7747 https://hdl.handle.net/10356/105835 http://hdl.handle.net/10220/48774 http://dx.doi.org/10.1109/TCSII.2018.2820155 en IEEE Transactions on Circuits and Systems II: Express Briefs © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCSII.2018.2820155. 5 p. application/pdf
institution	Nanyang Technological University
building	NTU Library
country	Singapore
collection	DR-NTU
language	English
topic	Current Mirror Level Shifter DRNTU::Engineering::Electrical and electronic engineering
spellingShingle	Current Mirror Level Shifter DRNTU::Engineering::Electrical and electronic engineering Le, Van Loi Kim, Tony Tae-Hyoung An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
description	This brief presents an ultra-low voltage level shifter (LS) with fast and energy-efficient voltage conversion from the deep subthreshold region to the superthreshold region. The proposed LS achieves better performance and increased energy efficiency by addressing the reduced swing and the slow fall transition issues in prior arts. A novel reduced-swing buffer design is proposed to attain lower standby power consumption while a pass transistor is used for improving the speed of the fall transition. The proposed LS consists of only 11 transistors occupying 7.45 μm 2 , which obtains the smallest area among the state-of-the-art ultra-low voltage LSs. Measurement results from a test chip fabricated in 65-nm CMOS technology demonstrate that the proposed LS shows the maximum leakage and speed improvements of 16.3× and 2.7× compared to the Wilson current mirror LS. The proposed LS also accomplishes the maximum switching energy reduction of 8.5× and can convert deep subthreshold voltage as low as 100 mV to the superthreshold voltage of 1.2 V.
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Le, Van Loi Kim, Tony Tae-Hyoung
format	Article
author	Le, Van Loi Kim, Tony Tae-Hyoung
author_sort	Le, Van Loi
title	An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
title_short	An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
title_full	An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
title_fullStr	An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
title_full_unstemmed	An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
title_sort	area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm cmos
publishDate	2019
url	https://hdl.handle.net/10356/105835 http://hdl.handle.net/10220/48774 http://dx.doi.org/10.1109/TCSII.2018.2820155
_version_	1681044899322920960

An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS

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