A time-delay-integration CMOS image sensor with pipelined charge transfer architecture

In this paper, we report a novel Time-Delay-Integration (TDI) CMOS image sensor for low-earth orbit (LEO) nano-satellite imaging application, where limited exposure time and unexpected flight fluctuations are major design challenges. The sensor features programmable integration time per stage, dynam...

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Main Authors: Yu, Hang, Qian, Xinyuan, Chen, Shoushun, Low, Kay-Soon
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2013
Subjects:
Online Access:https://hdl.handle.net/10356/106522
http://hdl.handle.net/10220/17624
http://dx.doi.org/10.1109/ISCAS.2012.6271566
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1065222019-12-06T22:13:24Z A time-delay-integration CMOS image sensor with pipelined charge transfer architecture Yu, Hang Qian, Xinyuan Chen, Shoushun Low, Kay-Soon School of Electrical and Electronic Engineering IEEE International Symposium on Circuits and Systems (2012 : Seoul, Korea) DRNTU::Engineering::Mechanical engineering::Machine design and construction In this paper, we report a novel Time-Delay-Integration (TDI) CMOS image sensor for low-earth orbit (LEO) nano-satellite imaging application, where limited exposure time and unexpected flight fluctuations are major design challenges. The sensor features programmable integration time per stage, dynamic charge transfer path and tunable well capacity. A prototype chip of 1536×8 pixels was implemented using TSMC 0.18µm CMOS image sensor process. Photodiode and other transistors are floor-planned in different arrays, providing small pixel pitch of 3.25µm and high fill factor of 57%. 2013-11-14T03:16:26Z 2019-12-06T22:13:24Z 2013-11-14T03:16:26Z 2019-12-06T22:13:24Z 2012 2012 Conference Paper Yu, H., Qian, X., Chen, S., & Low, K. S. (2012). A Time-Delay-Integration CMOS image sensor with pipelined charge transfer architecture. 2012 IEEE International Symposium on Circuits and Systems, pp.1624-1627. https://hdl.handle.net/10356/106522 http://hdl.handle.net/10220/17624 http://dx.doi.org/10.1109/ISCAS.2012.6271566 en
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Mechanical engineering::Machine design and construction
spellingShingle DRNTU::Engineering::Mechanical engineering::Machine design and construction
Yu, Hang
Qian, Xinyuan
Chen, Shoushun
Low, Kay-Soon
A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
description In this paper, we report a novel Time-Delay-Integration (TDI) CMOS image sensor for low-earth orbit (LEO) nano-satellite imaging application, where limited exposure time and unexpected flight fluctuations are major design challenges. The sensor features programmable integration time per stage, dynamic charge transfer path and tunable well capacity. A prototype chip of 1536×8 pixels was implemented using TSMC 0.18µm CMOS image sensor process. Photodiode and other transistors are floor-planned in different arrays, providing small pixel pitch of 3.25µm and high fill factor of 57%.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Yu, Hang
Qian, Xinyuan
Chen, Shoushun
Low, Kay-Soon
format Conference or Workshop Item
author Yu, Hang
Qian, Xinyuan
Chen, Shoushun
Low, Kay-Soon
author_sort Yu, Hang
title A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
title_short A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
title_full A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
title_fullStr A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
title_full_unstemmed A time-delay-integration CMOS image sensor with pipelined charge transfer architecture
title_sort time-delay-integration cmos image sensor with pipelined charge transfer architecture
publishDate 2013
url https://hdl.handle.net/10356/106522
http://hdl.handle.net/10220/17624
http://dx.doi.org/10.1109/ISCAS.2012.6271566
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