Synthesis and testing of asynchronous circuits - micropipeline
Regardless of how successful synchronous systems are, asynchronous design is an important research area since most of the asynchronous circuits provide higher performance. Since asynchronous circuits having no globally distributed clock, there are no problems about the clock skew occurring in syn...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/13307 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Regardless of how successful synchronous systems are, asynchronous design is an
important research area since most of the asynchronous circuits provide higher
performance. Since asynchronous circuits having no globally distributed clock,
there are no problems about the clock skew occurring in synchronous systems.
Micropipeline approach provides as a good powerful method to implement
asynchronous circuits. This project focused into the concurrent testing of fourphase
control structure along the pipeline. The proposed checker using doubleinput
double-output D flip-flop (DIDODFF) allows stuck-at fault detection in the
functional block or control structure of the micropipeline as well as the checker
itself. The checker is designed to meet the Totally Self-Checking (TSC) goal
based on the existing checker design concepts. |
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