Synthesis and testing of asynchronous circuits - micropipeline
Regardless of how successful synchronous systems are, asynchronous design is an important research area since most of the asynchronous circuits provide higher performance. Since asynchronous circuits having no globally distributed clock, there are no problems about the clock skew occurring in syn...
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sg-ntu-dr.10356-133072023-07-04T15:12:53Z Synthesis and testing of asynchronous circuits - micropipeline Khaing, Kathy. Wong, Eddie Moon Chung School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Regardless of how successful synchronous systems are, asynchronous design is an important research area since most of the asynchronous circuits provide higher performance. Since asynchronous circuits having no globally distributed clock, there are no problems about the clock skew occurring in synchronous systems. Micropipeline approach provides as a good powerful method to implement asynchronous circuits. This project focused into the concurrent testing of fourphase control structure along the pipeline. The proposed checker using doubleinput double-output D flip-flop (DIDODFF) allows stuck-at fault detection in the functional block or control structure of the micropipeline as well as the checker itself. The checker is designed to meet the Totally Self-Checking (TSC) goal based on the existing checker design concepts. Master of Science (Consumer Electronics) 2008-10-20T07:24:02Z 2008-10-20T07:24:02Z 1999 1999 Thesis http://hdl.handle.net/10356/13307 en 134 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Khaing, Kathy. Synthesis and testing of asynchronous circuits - micropipeline |
description |
Regardless of how successful synchronous systems are, asynchronous design is an
important research area since most of the asynchronous circuits provide higher
performance. Since asynchronous circuits having no globally distributed clock,
there are no problems about the clock skew occurring in synchronous systems.
Micropipeline approach provides as a good powerful method to implement
asynchronous circuits. This project focused into the concurrent testing of fourphase
control structure along the pipeline. The proposed checker using doubleinput
double-output D flip-flop (DIDODFF) allows stuck-at fault detection in the
functional block or control structure of the micropipeline as well as the checker
itself. The checker is designed to meet the Totally Self-Checking (TSC) goal
based on the existing checker design concepts. |
author2 |
Wong, Eddie Moon Chung |
author_facet |
Wong, Eddie Moon Chung Khaing, Kathy. |
format |
Theses and Dissertations |
author |
Khaing, Kathy. |
author_sort |
Khaing, Kathy. |
title |
Synthesis and testing of asynchronous circuits - micropipeline |
title_short |
Synthesis and testing of asynchronous circuits - micropipeline |
title_full |
Synthesis and testing of asynchronous circuits - micropipeline |
title_fullStr |
Synthesis and testing of asynchronous circuits - micropipeline |
title_full_unstemmed |
Synthesis and testing of asynchronous circuits - micropipeline |
title_sort |
synthesis and testing of asynchronous circuits - micropipeline |
publishDate |
2008 |
url |
http://hdl.handle.net/10356/13307 |
_version_ |
1772828883505119232 |