Efficient realization of householder transform through algorithm-architecture co-design for acceleration of QR factorization
QR factorization is a ubiquitous operation in many engineering and scientific applications. In this paper, we present efficient realization of Householder Transform (HT) based QR factorization through algorithm-architecture co-design where we achieve performance improvement of 3-90x in-terms of Gflo...
Saved in:
Main Authors: | Merchant, Farhad, Vatwani, Tarun, Chattopadhyay, Anupam, Raha, Soumyendu, Nandy, Soumitra Kumar, Narayan, Ranjani |
---|---|
Other Authors: | School of Computer Science and Engineering |
Format: | Article |
Language: | English |
Published: |
2020
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/142088 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Accelerating BLAS and LAPACK via efficient floating point architecture design
by: Merchant, Farhad, et al.
Published: (2020) -
Achieving efficient realization of Kalman Filter on CGRA through algorithm-architecture co-design
by: Merchant, Farhad, et al.
Published: (2020) -
Linear algebra for computer science
by: M. THULASIDAS,
Published: (2021) -
Linear Algebra for Computer Science
by: M. THULASIDAS,
Published: (2021) -
An application of graph theory in linear algebra
by: Anulat, Joel, et al.
Published: (1991)