Algorithms for reconfiguring NoC-based fault-tolerant multiprocessor arrays
This paper investigates the techniques to construct high-quality target processor array (fault-free logical subarray) from a physical array with faulty processing elements (PEs), where a fixed number of spare PEs are pre-integrated that can be used to replace the faulty ones when necessary. A reconf...
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Main Authors: | Wu, Jigang, Wu, Yalan, Jiang, Guiyuan, Lam, Siew Kei |
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Other Authors: | School of Computer Science and Engineering |
Format: | Article |
Language: | English |
Published: |
2020
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/142294 |
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Institution: | Nanyang Technological University |
Language: | English |
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