A dc-reactor-based solid-state fault current limiter for HVdc applications

• Main Authors: Heidary, Amir, Radmanesh, Hamid, Rouzbehi, Kumars, Pou, Josep
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2020
• 主題: Engineering::Electrical and electronic engineering; HVdc; Fault Current Limiters
• 在線閱讀: https://hdl.handle.net/10356/144517

Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an...