A low power pre-setting based sub-radix-2 approximation for multi-bit/cycle SAR ADCs
A pre-setting based sub-radix-2 approximation technique for multi-bit/cycle successive-approximation-register (SAR) analog to digital converters (ADCs) is proposed in this paper. The proposed approximation technique enhances the conversion speed and relieves the power hungry reference voltage buffer...
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Main Authors: | , , , |
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格式: | Article |
語言: | English |
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2021
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在線閱讀: | https://hdl.handle.net/10356/145691 |
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