A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle operation for medical imaging applications

• Main Authors: Sunny, Sharma, Chen, Yong, Boon, Chirn Chye
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2019
• 主題: 1.5-bit/cycle; ADC; Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/92451; http://hdl.handle.net/10220/49924

This paper reports a 10-bit 150 MS/s successive approximation register analog-to-digital converter with binary-scaled redundancy-facilitated error correction technique. The proposed 1.5-bit/cycle technique with built-in capacitive digital-to-analog converter (CDAC) redundancy, corrects multiple erro...