A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle operation for medical imaging applications
This paper reports a 10-bit 150 MS/s successive approximation register analog-to-digital converter with binary-scaled redundancy-facilitated error correction technique. The proposed 1.5-bit/cycle technique with built-in capacitive digital-to-analog converter (CDAC) redundancy, corrects multiple erro...
Saved in:
Main Authors: | Sunny, Sharma, Chen, Yong, Boon, Chirn Chye |
---|---|
Other Authors: | School of Electrical and Electronic Engineering |
Format: | Article |
Language: | English |
Published: |
2019
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/92451 http://hdl.handle.net/10220/49924 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
8 bit asynchronous SAR ADC
by: Mahesha, Ballaki Aditya
Published: (2024) -
A high-speed 2-bit/cycle SAR ADC with time-domain quantization
by: Qiu, Lei, et al.
Published: (2020) -
8-bit CMOS asynchronous dynamic reference ADC
by: Ng, Xiang Yang
Published: (2024) -
A low power pre-setting based sub-radix-2 approximation for multi-bit/cycle SAR ADCs
by: Qiu, Lei, et al.
Published: (2021) -
A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
by: Qiu, Lei, et al.
Published: (2020)