Lowering dynamic power of a stream-based CNN hardware accelerator

• المؤلفون الرئيسيون: Piyasena, Duvindu, Wickramasinghe, Rukshan, Paul, Debdeep, Lam, Siew-Kei, Wu, Meiqing
• مؤلفون آخرون: School of Computer Science and Engineering
• التنسيق: Conference or Workshop Item
• اللغة: English
• منشور في: 2021
• الموضوعات: Engineering::Computer science and engineering::Hardware::Register-transfer-level implementation; Engineering::Computer science and engineering::Computing methodologies::Image processing and computer vision; FPGA; Convolutional Neural Networks
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/147509

Custom hardware accelerators of Convolutional Neural Networks (CNN) provide a promising solution to meet real-time constraints for a wide range of applications on low-cost embedded devices. In this work, we aim to lower the dynamic power of a stream-based CNN hardware accelerator by reducing the com...