A hierarchical multiclassifier system for automated analysis of delayered IC images

A hierarchical multiclassifier system for automated analysis of delayered IC images

A robust and accurate machine learning based hierarchical multiclassifier system is proposed to automate the retrieval of interconnection information from delayered integrated circuits images. The proposed system replaces labor-intensive manual annotation process and provides an effective approach f...

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Bibliographic Details
Main Authors: Cheng, Deruo, Shi, Yiqiong, Gwee, Bah-Hwee, Toh, Kar-Ann, Lin, Tong
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2021
Subjects:
Engineering::Electrical and electronic engineering
Shape
Integrated Circuits
Online Access:https://hdl.handle.net/10356/150807
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Institution: Nanyang Technological University
Language: English
Description
Summary:A robust and accurate machine learning based hierarchical multiclassifier system is proposed to automate the retrieval of interconnection information from delayered integrated circuits images. The proposed system replaces labor-intensive manual annotation process and provides an effective approach for the automated analysis of state-of-the-art deep submicron IC chips.

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