Reduced worst-case communication latency using single-cycle multi-hop traversal network-on-chip

• Main Authors: Chen, Peng, Liu, Weichen, Chen, Hui, Li, Shiqing, Li, Mengquan, Yang, Lei, Guan, Nan
• Other Authors: School of Computer Science and Engineering
• Format: Article
• Language: English
• Published: 2021
• Subjects: Engineering::Computer science and engineering; Real-time Systems; Scheduling
• Online Access: https://hdl.handle.net/10356/151848
• Institution: Nanyang Technological University

The communication latency in traditional Network-on-Chip (NoC) with hop-by-hop traversal is inherently restricted by the distance between source-destination communicating pairs. SMART, as one of the dynamically reconfigurable NoC architectures, enables the new feature of single-cycle long-distance c...