Hierarchical aggregation/disaggregation for adaptive abstraction-level conversion in digital twin-based smart semiconductor manufacturing

• Main Authors: Seok, Moon Gi, Cai, Wentong, Park, Daejin
• Other Authors: School of Computer Science and Engineering
• Format: Article
• Language: English
• Published: 2022
• Subjects: Engineering::Computer science and engineering; Abstraction-Level Conversion; Aggregation/Disaggregation
• Online Access: https://hdl.handle.net/10356/154073
• Institution: Nanyang Technological University

In smart manufacturing, engineers typically analyze unexpected real-time problems using digitally cloned discrete-event (DE) models for wafer fabrication. To achieve a faster response to problems, it is essential to increase the speed of DE simulations because making optimal decisions for addressing the issues requires repeated simulations. This paper presents a hierarchical aggregation/disaggregation (A/D) method that substitutes complex event-driven operations with two-layered abstracted models-single-group mean-delay models (SMDMs) and multi-group MDMs (MMDMs)-to gain simulation speedup. The SMDM dynamically abstracts a DE machine group's behaviors into observed mean-delay constants when the group converges into a steady state. The MMDM fast-forwards the input lots by bypassing the chained processing steps in multiple steady-state groups until it schedules the lots for delivery to subsequent unsteady groups after corresponding multi-step mean delays. The key component, the abstraction-level converter (ALC), has the roles of MMDM allocation, deallocation, extension, splitting, and controls the flow of each group's input lot by deciding the destination DE model, SMDM, and MMDMs. To maximize the reuse of previously computed multi-step delays for the dynamically changing MMDMs, we propose an efficient method to manage the delays using two-level caches. Each steady-state group's ALC performs statistical testing to detect the lot-arrival change to reactivate the DE model. However, fast-forwarding (FF) results in incorrect test results of the bypassed group's ALCs due to the missed observations of the bypassed lots. Thus, we propose a method for test-sample reinitialization that considers the bypassing. Moreover, since a bypassed group's unexpected divergence can change the multi-step delays of previously scheduled events, a method for examination of FF history is designed to trace the highly influenced events. This proposed method has been applied in various case studies, and it has achieved speedups of up to about 5.9 times, with 2.5 to 8.3% degradation in accuracy.