Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

In this paper, an attempt to estimate energy consumption bounds versus signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) in CMOS current-steering digital-to-analog converters is presented. A theoretical analysis is derived, including the design corners for noise, speed and linearity...

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Main Authors: Chacón, Oscar Morales, Wikner, J. Jacob, Svensson, Christer, Siek, Liter, Alvandpour, Atila
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2022
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Online Access:https://hdl.handle.net/10356/162707
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spelling sg-ntu-dr.10356-1627072022-11-07T04:49:17Z Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters Chacón, Oscar Morales Wikner, J. Jacob Svensson, Christer Siek, Liter Alvandpour, Atila School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Digital-to-Analog Converter CMOS In this paper, an attempt to estimate energy consumption bounds versus signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) in CMOS current-steering digital-to-analog converters is presented. A theoretical analysis is derived, including the design corners for noise, speed and linearity for the mixed-signal domain. The study is validated by comparing the theoretical results with published measured data. As result it serves as a design reference to aim for minimum energy consumption. It is found that for an equivalent number of bits (ENOBs), the noise-bound grows at a rate of 22ENOB, whereas the speed-bound increases by 2ENOB−2 and is dependent on device dimensions. Therefore, as the technology scales down, the noise bound will dominate, which is observed for an estimated SNR of about 40 dB in 65 nm CMOS process. The linearity bound is derived from an analysis based on the assumption of limited output impedance, where it is found to be dependent on the device dimensions and increase at a rate of 2ENOB−1. The observations show that it is possible to achieve less energy consumption in all the design corners for different SNR and SFDR specifications within the Nyquist frequency, fs/2. Published version This work is financially supported by innovation agency (VINNOVA) under project 2017-04891, the strategic research environment funded by the Swedish government (ELLIIT), and the Swedish foundation for international cooperation in research and higher education (STINT). Open access funding provided by Linkoping University. 2022-11-07T04:49:16Z 2022-11-07T04:49:16Z 2022 Journal Article Chacón, O. M., Wikner, J. J., Svensson, C., Siek, L. & Alvandpour, A. (2022). Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters. Analog Integrated Circuits and Signal Processing, 111(3), 339-351. https://dx.doi.org/10.1007/s10470-022-02013-2 0925-1030 https://hdl.handle.net/10356/162707 10.1007/s10470-022-02013-2 2-s2.0-85127279834 3 111 339 351 en Analog Integrated Circuits and Signal Processing © The Author(s) 2022. Open Access. This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons. org/licenses/by/4.0/. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
Digital-to-Analog Converter
CMOS
spellingShingle Engineering::Electrical and electronic engineering
Digital-to-Analog Converter
CMOS
Chacón, Oscar Morales
Wikner, J. Jacob
Svensson, Christer
Siek, Liter
Alvandpour, Atila
Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
description In this paper, an attempt to estimate energy consumption bounds versus signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) in CMOS current-steering digital-to-analog converters is presented. A theoretical analysis is derived, including the design corners for noise, speed and linearity for the mixed-signal domain. The study is validated by comparing the theoretical results with published measured data. As result it serves as a design reference to aim for minimum energy consumption. It is found that for an equivalent number of bits (ENOBs), the noise-bound grows at a rate of 22ENOB, whereas the speed-bound increases by 2ENOB−2 and is dependent on device dimensions. Therefore, as the technology scales down, the noise bound will dominate, which is observed for an estimated SNR of about 40 dB in 65 nm CMOS process. The linearity bound is derived from an analysis based on the assumption of limited output impedance, where it is found to be dependent on the device dimensions and increase at a rate of 2ENOB−1. The observations show that it is possible to achieve less energy consumption in all the design corners for different SNR and SFDR specifications within the Nyquist frequency, fs/2.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Chacón, Oscar Morales
Wikner, J. Jacob
Svensson, Christer
Siek, Liter
Alvandpour, Atila
format Article
author Chacón, Oscar Morales
Wikner, J. Jacob
Svensson, Christer
Siek, Liter
Alvandpour, Atila
author_sort Chacón, Oscar Morales
title Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
title_short Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
title_full Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
title_fullStr Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
title_full_unstemmed Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters
title_sort analysis of energy consumption bounds in cmos current-steering digital-to-analog converters
publishDate 2022
url https://hdl.handle.net/10356/162707
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