Design of a CMOS voltage reference with output voltage doubling using modified 2-transistor topology

• المؤلف الرئيسي: Li, Junyao
• مؤلفون آخرون: Chan Pak Kwong
• التنسيق: Thesis-Master by Coursework
• اللغة: English
• منشور في: Nanyang Technological University 2023
• الموضوعات: Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/164104
• المؤسسة: Nanyang Technological University

This dissertation presents an ultra-low power CMOS voltage reference which operates in the subthreshold region. Modified from the conventional 2T circuit, the proposed circuit is capable to generate higher output voltage by using the resistor subdivision. The design comprises a negative-thresh...