Design of a CMOS voltage reference with output voltage doubling using modified 2-transistor topology

This dissertation presents an ultra-low power CMOS voltage reference which operates in the subthreshold region. Modified from the conventional 2T circuit, the proposed circuit is capable to generate higher output voltage by using the resistor subdivision. The design comprises a negative-thresh...

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Bibliographic Details
Main Author: Li, Junyao
Other Authors: Chan Pak Kwong
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2023
Subjects:
Online Access:https://hdl.handle.net/10356/164104
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Institution: Nanyang Technological University
Language: English
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