Design of a CMOS voltage reference with output voltage doubling using modified 2-transistor topology
This dissertation presents an ultra-low power CMOS voltage reference which operates in the subthreshold region. Modified from the conventional 2T circuit, the proposed circuit is capable to generate higher output voltage by using the resistor subdivision. The design comprises a negative-thresh...
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| 格式: | Thesis-Master by Coursework |
| 語言: | English |
| 出版: |
Nanyang Technological University
2023
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/164104 |
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