A 0.6 V 4 GS/s - 56.4 dB THD voltage-to-time converter in 28 nm CMOS

• Main Authors: Chen, Qian, Boon, Chirn Chye, Liang, Yuan
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2023
• 主題: Engineering::Electrical and electronic engineering; Shrink Sampling; Time-Domain Signal Processing
• 在線閱讀: https://hdl.handle.net/10356/165010
• 機構: Nanyang Technological University

A 0.6 V voltage-to-time converter (VTC) has been presented in this work for the emerging energy-efficient time-domain circuits and systems. The proposed VTC supports a rail-to-rail input by leveraging shrink sampling with two cascaded voltage sampling and charge sharing switches, breaking the tradeo...