Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)

With the continuous development of deep learning, the scientific community continues to propose new neural network architectures based on brain-inspired research. So far, the architecture of neural networks has changed over three generations. The neural network-Spiking Neural Network (SNN) has arous...

Full description

Saved in:

Bibliographic Details
Main Author:	Wu, Si
Other Authors:	Lin Zhiping
Format:	Thesis-Master by Coursework
Language:	English
Published:	Nanyang Technological University 2023
Subjects:	Engineering::Electrical and electronic engineering
Online Access:	https://hdl.handle.net/10356/166409
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	Nanyang Technological University
Language:	English

id	sg-ntu-dr.10356-166409
record_format	dspace
spelling	sg-ntu-dr.10356-1664092023-07-04T16:18:24Z Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA) Wu, Si Lin Zhiping School of Electrical and Electronic Engineering Technical University of Munich EZPLin@ntu.edu.sg Engineering::Electrical and electronic engineering With the continuous development of deep learning, the scientific community continues to propose new neural network architectures based on brain-inspired research. So far, the architecture of neural networks has changed over three generations. The neural network-Spiking Neural Network (SNN) has aroused great interest among researchers. Compared with the second-generation neural network, SNN uses spikes to process information. The neuronal units in SNNs are only active when they receive or emit spikes, so it is event-driven, thus making it energy-efficient. This dissertation investigates the low power dissipation characteristics of the SNN and proposes effective techniques to reduce the power dissipation of its operations. This dissertation is based on a realized small system-level SNN network architecture. We are trying to optimize the structure of the system with the help of Wave Dynamic Differential Logic. We found the computation unit of LIF neurons and rewrite their structure of them. And we successfully reduced 7.59% of the total power in critical computation units compared to single-rail circuits. The result proved that WDDL has great potential in lowering the power consumption of circuits. Master of Science (Green Electronics) 2023-04-27T06:29:39Z 2023-04-27T06:29:39Z 2023 Thesis-Master by Coursework Wu, S. (2023). Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA). Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/166409 https://hdl.handle.net/10356/166409 en 2021-T1-001-099(RG 51/21) application/pdf Nanyang Technological University
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
language	English
topic	Engineering::Electrical and electronic engineering
spellingShingle	Engineering::Electrical and electronic engineering Wu, Si Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
description	With the continuous development of deep learning, the scientific community continues to propose new neural network architectures based on brain-inspired research. So far, the architecture of neural networks has changed over three generations. The neural network-Spiking Neural Network (SNN) has aroused great interest among researchers. Compared with the second-generation neural network, SNN uses spikes to process information. The neuronal units in SNNs are only active when they receive or emit spikes, so it is event-driven, thus making it energy-efficient. This dissertation investigates the low power dissipation characteristics of the SNN and proposes effective techniques to reduce the power dissipation of its operations. This dissertation is based on a realized small system-level SNN network architecture. We are trying to optimize the structure of the system with the help of Wave Dynamic Differential Logic. We found the computation unit of LIF neurons and rewrite their structure of them. And we successfully reduced 7.59% of the total power in critical computation units compared to single-rail circuits. The result proved that WDDL has great potential in lowering the power consumption of circuits.
author2	Lin Zhiping
author_facet	Lin Zhiping Wu, Si
format	Thesis-Master by Coursework
author	Wu, Si
author_sort	Wu, Si
title	Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
title_short	Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
title_full	Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
title_fullStr	Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
title_full_unstemmed	Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
title_sort	event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (fpga)
publisher	Nanyang Technological University
publishDate	2023
url	https://hdl.handle.net/10356/166409
_version_	1772828609408401408

Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)

Similar Items