An FPGA-Based Co-Processor for Spiking Neural Networks with On-Chip STDP-Based Learning

An FPGA-Based Co-Processor for Spiking Neural Networks with On-Chip STDP-Based Learning

10.1109/ISCAS48785.2022.9937891

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Bibliographic Details
Main Authors: Nguyen, Thao NN, Veeravalli, Bharadwaj, Fong, Xuanyao
Other Authors: ELECTRICAL AND COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: IEEE 2023
Subjects:
Science & Technology
Technology
Engineering, Electrical & Electronic
Engineering
Spiking Neural Networks
Reconfigurable Computing
Hardware Accelerator
On-Chip Learning
MODEL
Online Access:https://scholarbank.nus.edu.sg/handle/10635/245762
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Institution: National University of Singapore

Internet

https://scholarbank.nus.edu.sg/handle/10635/245762

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