AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis
Data-intensive machine learning applications require significant computing power, which cannot be efficiently handled by general-purpose microprocessors. Field Programmable Gate Arrays (FPGAs) offer a solution by allowing the creation of application-specific circuits that can accelerate these tasks...
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| Format: | Final Year Project |
| Language: | English |
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Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/166976 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Data-intensive machine learning applications require significant computing power, which cannot be efficiently handled by general-purpose microprocessors. Field Programmable Gate Arrays (FPGAs) offer a solution by allowing the creation of application-specific circuits that can accelerate these tasks with high throughput and low latency.
This project aims to explore existing open-source research on FPGA accelerators and optimize them using a more effective computation model. The accelerator will also be implemented such that it can defend against some Side-Channel Attacks. The resulting accelerator will be implemented on the DE-10 standard FPGA board. The report will detail the methodologies used, the challenges faced, and the evolution of the final product from ideation to maturity. |
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