Channel modeling and FPGA implementation for magnetic recording

• Main Author: Tan, Jing Jie.
• Other Authors: Goh Wang Ling
• Format: Final Year Project
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/17851
• Institution: Nanyang Technological University

This report aims to design and implement a channel model on the Xllinx Spartan-3E XC3S500E Field Programmable Gate Array (FPGA) board. The channel model basically comprises of two main parts, a Finite Impulse Response (FIR) filter and an irregular Low- Density Parity-Check (LDPC) encoder.