H.264 encoder on embedded DSP platform
With the widespread adoption of technologies such as digital television, Internet streaming video and DVD-Video, video compression has become an essential component of broadband entertainment. In this project, a H.264 baseline encoder is implemented to run on a Texas Instrument‟s TMS320DM642 dig...
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sg-ntu-dr.10356-170202023-03-03T20:52:01Z H.264 encoder on embedded DSP platform Cai, Yuejun Vun Chan Hua, Nicholas School of Computer Engineering Centre for Multimedia and Network Technology DRNTU::Engineering::Computer science and engineering::Computing methodologies::Image processing and computer vision DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems With the widespread adoption of technologies such as digital television, Internet streaming video and DVD-Video, video compression has become an essential component of broadband entertainment. In this project, a H.264 baseline encoder is implemented to run on a Texas Instrument‟s TMS320DM642 digital media processor based embedded platform. The main objective of this project is to optimize the software based encoder around the limited hardware resources available on the embedded platform, attempting to achieve real-time performance with pure focus on encoding speed. The encoder developed could be used as the platform to implement a low bitrate streaming video surveillance camera. In this report, the basic principles of H.264/AVC encoding and hardware components are first discussed. Data and memory optimization techniques on embedded systems are studied extensively in an attempt to understand the effect of the memory bandwidth‟s bottleneck on the encoder performance. Code optimization is also then carried out with thorough understanding of H.264/AVC reference software. Various compiler optimizations, based on Code Composer Studio version 3.1 are used to evaluate their effects on the performance. Experimental results and various stages of optimizing the encoder will be shown clearly, together with the various difficulties and problems encountered, and the solutions used to resolve the challenges faced. Using the memory optimization, code optimization and compiler optimization techniques, the optimized baseline encoder is able to encode ten frames of video per second. While this is still shorts of the benchmark of a commercial grade system, this is a very significant improvement compared to the original encoder used at the start of the project which takes 1 minute 31 seconds to encode ten similar frames of video. The encoder developed hence will be suitable to be used as the base module to incorporate more advanced features with the aim to implement an intelligent surveillance camera system. Bachelor of Engineering (Computer Engineering) 2009-05-29T03:59:14Z 2009-05-29T03:59:14Z 2009 2009 Final Year Project (FYP) http://hdl.handle.net/10356/17020 en Nanyang Technological University 152 p. application/pdf |
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DRNTU::Engineering::Computer science and engineering::Computing methodologies::Image processing and computer vision DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems Cai, Yuejun H.264 encoder on embedded DSP platform |
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With the widespread adoption of technologies such as digital television, Internet streaming video and DVD-Video, video compression has become an essential component of broadband entertainment.
In this project, a H.264 baseline encoder is implemented to run on a Texas Instrument‟s TMS320DM642 digital media processor based embedded platform. The main objective of this project is to optimize the software based encoder around the limited hardware resources available on the embedded platform, attempting to achieve real-time performance with pure focus on encoding speed. The encoder developed could be used as the platform to implement a low bitrate streaming video surveillance camera.
In this report, the basic principles of H.264/AVC encoding and hardware components are first discussed. Data and memory optimization techniques on embedded systems are studied extensively in an attempt to understand the effect of the memory bandwidth‟s bottleneck on the encoder performance. Code optimization is also then carried out with thorough understanding of H.264/AVC reference software. Various compiler optimizations, based on Code Composer Studio version 3.1 are used to evaluate their effects on the performance. Experimental results and various stages of optimizing the encoder will be shown clearly, together with the various difficulties and problems encountered, and the solutions used to resolve the challenges faced.
Using the memory optimization, code optimization and compiler optimization techniques, the optimized baseline encoder is able to encode ten frames of video per second. While this is still shorts of the benchmark of a commercial grade system, this is a very significant improvement compared to the original encoder used at the start of the project which takes 1 minute 31 seconds to encode ten similar frames of video. The encoder developed hence will be suitable to be used as the base module to incorporate more advanced features with the aim to implement an intelligent surveillance camera system. |
author2 |
Vun Chan Hua, Nicholas |
author_facet |
Vun Chan Hua, Nicholas Cai, Yuejun |
format |
Final Year Project |
author |
Cai, Yuejun |
author_sort |
Cai, Yuejun |
title |
H.264 encoder on embedded DSP platform |
title_short |
H.264 encoder on embedded DSP platform |
title_full |
H.264 encoder on embedded DSP platform |
title_fullStr |
H.264 encoder on embedded DSP platform |
title_full_unstemmed |
H.264 encoder on embedded DSP platform |
title_sort |
h.264 encoder on embedded dsp platform |
publishDate |
2009 |
url |
http://hdl.handle.net/10356/17020 |
_version_ |
1759856632494292992 |