A digital bit-reconfigurable versatile compute-in-memory macro for machine learning acceleration
This brief proposes a digital versatile SRAM-based computing-in-memory (CIM) macro with reconfigurable precision from 1-bit to 16-bit and programmable mathematical functions, including addition and multiplication. The proposed CIM macro supports 116-bit weight-stationary addition (WSA) and operands-...
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Main Authors: | , , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2023
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/170326 |
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Institution: | Nanyang Technological University |
Language: | English |