A reconfigurable in-memory-computation architecture with in-situ update and shift capability
This work proposes a storage element (SE) design for in-memory computing (IMC). Using the proposed SE design, an IMC array has been constructed to enable in-situ updates of stored weights. Compared with some existing related works which employ 2n bit cells for storing an n-bit value, the proposed st...
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Main Authors: | , , , , , , |
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格式: | Article |
語言: | English |
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2024
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在線閱讀: | https://hdl.handle.net/10356/179853 |
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