FAC: a fault-tolerant design approach based on approximate computing
This article introduces a new fault-tolerant design approach based on approximate computing, called FAC, for designing redundant circuits and systems. Traditionally, triple modular redundancy (TMR) has been used to ensure complete tolerance to any single fault or a faulty processing unit, where the...
Saved in:
Main Authors: | Balasubramanian, Padmanabhan, Maskell, Douglas Leslie |
---|---|
Other Authors: | School of Computer Science and Engineering |
Format: | Article |
Language: | English |
Published: |
2023
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/170487 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
A fault-tolerant design strategy utilizing approximate computing
by: Balasubramanian, Padmanabhan, et al.
Published: (2023) -
Approximate array multipliers
by: Balasubramanian, Padmanabhan, et al.
Published: (2021) -
Hardware efficient approximate adder design
by: Balasubramanian, Padmanabhan, et al.
Published: (2020) -
A monotonic early output asynchronous full adder
by: Balasubramanian, Padmanabhan, et al.
Published: (2023) -
RESAC: a redundancy strategy involving approximate computing for error-tolerant applications
by: Balasubramanian, Padmanabhan, et al.
Published: (2024)