A time-domain wavefront computing accelerator with a 32 × 32 reconfigurable PE array
This work presents a hardware accelerator realizing true time-domain wavefront computing in a massive parallel two-dimensional (2-D) processing element (PE) array. The proposed 2-D time-domain PE array is designed for multiple applications based on its scalable and reconfigurable architecture. The s...
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Main Authors: | , , , , , |
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格式: | Article |
語言: | English |
出版: |
2023
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在線閱讀: | https://hdl.handle.net/10356/170677 |
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機構: | Nanyang Technological University |
語言: | English |