A time-domain wavefront computing accelerator with a 32 × 32 reconfigurable PE array

This work presents a hardware accelerator realizing true time-domain wavefront computing in a massive parallel two-dimensional (2-D) processing element (PE) array. The proposed 2-D time-domain PE array is designed for multiple applications based on its scalable and reconfigurable architecture. The s...

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Bibliographic Details
Main Authors: Yu, Chengshuo, Mu, Junjie, Su, Yuqi, Chai, Kevin Tshun Chuan, Kim, Tony Tae-Hyoung, Kim, Bongjin
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2023
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Online Access:https://hdl.handle.net/10356/170677
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Institution: Nanyang Technological University
Language: English

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