Exploration and design of SAR/SS ADC for in-memory computation
Compute-in-memory (CIM), as a solution to the von Neumann bottleneck, has gained widespread attention in recent years. In CIM operations, ADCs are typically required to convert analog voltages into digital codes. However, current CIM ADCs often demand substantial silicon area and operational power c...
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| 格式: | Thesis-Master by Coursework |
| 語言: | English |
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Nanyang Technological University
2024
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| 在線閱讀: | https://hdl.handle.net/10356/173431 |
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| 機構: | Nanyang Technological University |
| 語言: | English |