A high-accuracy and energy-efficient spiking neural network with On-FPGA STDP learning based on asynchronous CORDIC
During the last few decades, Moore's law has propelled the anticipation of exponential growth in computing capabilities, primarily associated with silicon-based processing devices. However, as we approach the culmination of this trend, there is a compelling motivation to explore avenues...
Saved in:
Main Author: | Sheng, Shirui |
---|---|
Other Authors: | Lin Zhiping |
Format: | Thesis-Master by Coursework |
Language: | English |
Published: |
Nanyang Technological University
2024
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/173705 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
An FPGA-Based Co-Processor for Spiking Neural Networks with On-Chip STDP-Based Learning
by: Nguyen, Thao NN, et al.
Published: (2023) -
A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
by: Narasimman, Govind, et al.
Published: (2016) -
A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks
by: Narasimman, Govind, et al.
Published: (2019) -
Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)
by: Wu, Si
Published: (2023) -
Cordic core based quantum readout processing block design on FPGA
by: Cao, Hongyu
Published: (2024)