Digital ReRAM-based compute-in-memory design

As Artificial Intelligence (AI) continues to advance, the continuous pursuit of computational power makes in-store computing a hot topic in present research. This work aims to address the limitations of traditional compute-in-memory (CIM) architectures, proposing an innovative all-digital ReRAM-base...

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Main Author: Xu, Jiawei
Other Authors: Kim Tae Hyoung
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2024
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Online Access:https://hdl.handle.net/10356/175060
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1750602024-04-19T15:58:10Z Digital ReRAM-based compute-in-memory design Xu, Jiawei Kim Tae Hyoung School of Electrical and Electronic Engineering THKIM@ntu.edu.sg Engineering Compute-in-memory ReRAM As Artificial Intelligence (AI) continues to advance, the continuous pursuit of computational power makes in-store computing a hot topic in present research. This work aims to address the limitations of traditional compute-in-memory (CIM) architectures, proposing an innovative all-digital ReRAM-based CIM architecture tailored for edge AI applications. Firstly, the recent paper about ReRAM CIM is reviewed and the basic properties of ReRAM and its working principle are introduced. Following, a novel ReRAM structure 2T2R is introduced. The proposed 2T2R cell eliminates the problems associated with traditional analog designs and has better stability. The CIM architecture can support reconfigurable computing with weight precision ranging from 1 to 8 bits. Simulation results have demonstrated the architecture’s capability to perform 9-bit multiply-accumulate (MAC) operations as well as read/write operations without any loss of accuracy, showcasing its precision and reliability. In terms of computational efficiency, the architecture achieves an exceptional energy efficiency of 15.6 TOPS/W in computational mode. Master's degree 2024-04-19T02:14:24Z 2024-04-19T02:14:24Z 2024 Thesis-Master by Coursework Xu, J. (2024). Digital ReRAM-based compute-in-memory design. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/175060 https://hdl.handle.net/10356/175060 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering
Compute-in-memory
ReRAM
spellingShingle Engineering
Compute-in-memory
ReRAM
Xu, Jiawei
Digital ReRAM-based compute-in-memory design
description As Artificial Intelligence (AI) continues to advance, the continuous pursuit of computational power makes in-store computing a hot topic in present research. This work aims to address the limitations of traditional compute-in-memory (CIM) architectures, proposing an innovative all-digital ReRAM-based CIM architecture tailored for edge AI applications. Firstly, the recent paper about ReRAM CIM is reviewed and the basic properties of ReRAM and its working principle are introduced. Following, a novel ReRAM structure 2T2R is introduced. The proposed 2T2R cell eliminates the problems associated with traditional analog designs and has better stability. The CIM architecture can support reconfigurable computing with weight precision ranging from 1 to 8 bits. Simulation results have demonstrated the architecture’s capability to perform 9-bit multiply-accumulate (MAC) operations as well as read/write operations without any loss of accuracy, showcasing its precision and reliability. In terms of computational efficiency, the architecture achieves an exceptional energy efficiency of 15.6 TOPS/W in computational mode.
author2 Kim Tae Hyoung
author_facet Kim Tae Hyoung
Xu, Jiawei
format Thesis-Master by Coursework
author Xu, Jiawei
author_sort Xu, Jiawei
title Digital ReRAM-based compute-in-memory design
title_short Digital ReRAM-based compute-in-memory design
title_full Digital ReRAM-based compute-in-memory design
title_fullStr Digital ReRAM-based compute-in-memory design
title_full_unstemmed Digital ReRAM-based compute-in-memory design
title_sort digital reram-based compute-in-memory design
publisher Nanyang Technological University
publishDate 2024
url https://hdl.handle.net/10356/175060
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