The design of a 10-bit segmented current steering digital-to-analog converter (SCSDAC)
This thesis explores the design of a 10-bit Segmented Current Steering Digital-to-Analog Converter (SCSDAC), focusing on optimizing performance under stringent power constraints. The DAC is meticulously crafted to minimize power usage and maximize efficiency, aiming to operate below the conventional...
Saved in:
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Final Year Project |
| Language: | English |
| Published: |
Nanyang Technological University
2024
|
| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/177198 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Institution: | Nanyang Technological University |
| Language: | English |
Be the first to leave a comment!