FPGA development for HDD servo demodulation

This final year project involves the development for Hard Disk Drive (HDD) servo demodulation. To achieve this, algorithms of timing recovery in digital data have been introduced and a Digital Phase-Locked Loop (DPLL) has been designed by using ALTERA®’s industrial design software Quartus® II. The D...

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書目詳細資料
主要作者: Shi, Yi Jun.
其他作者: Xue Ping
格式: Final Year Project
語言:English
出版: 2009
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在線閱讀:http://hdl.handle.net/10356/18058
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