Reconfigurable dielectric engineered WSe2/HZO mem-transistor

• Main Authors: Tong, Tong, He, Yongli, Gao, Yuan, Liu, Yukang, Liao, Kan, Li, Weisheng
• Other Authors: School of Materials Science and Engineering
• Format: Article
• Language: English
• Published: 2024
• Subjects: Engineering; Linear conductance update; Reliable memory properties
• Online Access: https://hdl.handle.net/10356/180774
• Institution: Nanyang Technological University

Hybrid systems coupling two-dimensional (2D) semiconductors with functional ferroelectrics are attracting increasing attention owing to their excellent electronic/optoelectronic properties and new functionalities through the multiple heterointerface interactions. In our device architecture, interfacial states are introduced on the ferroelectric Hf0.5Zr0.5O2 thin film as a gate dielectric layer for the charge trapping effect. Utilizing the collaborative effects of charge trapping and ferroelectric polarization behavior, a multifunctional 2D WSe2/HZO memtransistor is demonstrated with an ultra-low off-state (dark) current of 10−13 A, high on/off ratio of 106 and linear conductance update. This device exhibits reliable memory properties and tunable synaptic functions including short-term plasticity/long-term plasticity, paired pulse facilitation, spike-timing dependent plasticity, synaptic potentiation/depression, and filtering in a single device. Extensive endurance tests ensure robust stability (1000 switching cycles, 2000 s holding time) and the synaptic weight update in the device exhibits excellent linearity. Based on the experimental data, our devices eventually achieve an accuracy of 94.8% in artificial neural network simulations. These results highlight a new approach for constructing hybrid systems coupling 2D semiconductors with functional ferroelectrics in a single device to tune synaptic weight, optimize circuit design, and build artificial neuromorphic computing systems.