Feasibility studies of high data rate ADC

In the design project, a 2-bit flash ADC stage has been developed. All the functional blocks are investigated and optimized according the design specifications. The proposed fully differential double-sampled sample and hold circuit with low pedestal error and a fully differential dynamic latch compa...

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Bibliographic Details
Main Author: Goo, Yong Soon.
Other Authors: Boon Chirn Chye
Format: Final Year Project
Language:English
Published: 2009
Subjects:
Online Access:http://hdl.handle.net/10356/18375
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Institution: Nanyang Technological University
Language: English
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