Design and implementation of a high speed chess move generator
This thesis describes the design and implementation of high speed hardware chess modules which can be used to form a complete high speed chess machine. It describes how the large task of computer chess was parallelized and implemented on a field programmable gate array (FPGA) platform. The main modu...
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Main Author: | Jaya Shankar Pathmasuntharam |
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Other Authors: | Goh, Wee Leng |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2009
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Subjects: | |
Online Access: | http://hdl.handle.net/10356/19623 |
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Institution: | Nanyang Technological University |
Language: | English |
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