Design concerns for EEPROM
The floating gate EEPROM has been a popular choice for semiconductor memories for many years. In this thesis, several areas relating to design concerns of the device have been explored. Phenomena such as charge trapping in tunnel oxide was investigated using the thin oxide MOS capacitor while device...
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2009
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sg-ntu-dr.10356-196912023-07-04T15:23:10Z Design concerns for EEPROM Tan, Hong Mui. Tse, Man Siu School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The floating gate EEPROM has been a popular choice for semiconductor memories for many years. In this thesis, several areas relating to design concerns of the device have been explored. Phenomena such as charge trapping in tunnel oxide was investigated using the thin oxide MOS capacitor while device degradation was invesigaed on the EEPROM cell. Master of Engineering 2009-12-14T06:21:54Z 2009-12-14T06:21:54Z 1995 1995 Thesis http://hdl.handle.net/10356/19691 en NANYANG TECHNOLOGICAL UNIVERSITY 86 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Tan, Hong Mui. Design concerns for EEPROM |
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The floating gate EEPROM has been a popular choice for semiconductor memories for many years. In this thesis, several areas relating to design concerns of the device have been explored. Phenomena such as charge trapping in tunnel oxide was investigated using the thin oxide MOS capacitor while device degradation was invesigaed on the EEPROM cell. |
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Tse, Man Siu |
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Tse, Man Siu Tan, Hong Mui. |
format |
Theses and Dissertations |
author |
Tan, Hong Mui. |
author_sort |
Tan, Hong Mui. |
title |
Design concerns for EEPROM |
title_short |
Design concerns for EEPROM |
title_full |
Design concerns for EEPROM |
title_fullStr |
Design concerns for EEPROM |
title_full_unstemmed |
Design concerns for EEPROM |
title_sort |
design concerns for eeprom |
publishDate |
2009 |
url |
http://hdl.handle.net/10356/19691 |
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1772827112955183104 |