Modeling of submicron MOSFETs

The Lightly Doped Drain (LDD) structure is the current-art transistor structure for fabricating submicron and deep-submicron Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). This thesis describes a simple and efficient (computer-time less intensive) model for predicting the LDD MOSFET c...

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Main Author: Chua, Ley Mui.
Other Authors: Lau, Kim Teen
Format: Theses and Dissertations
Language:English
Published: 2009
Subjects:
Online Access:http://hdl.handle.net/10356/19757
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Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-19757
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spelling sg-ntu-dr.10356-197572023-07-04T15:45:27Z Modeling of submicron MOSFETs Chua, Ley Mui. Lau, Kim Teen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Semiconductors The Lightly Doped Drain (LDD) structure is the current-art transistor structure for fabricating submicron and deep-submicron Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). This thesis describes a simple and efficient (computer-time less intensive) model for predicting the LDD MOSFET current-voltage (I-V) characteristics. 2009-12-14T06:34:11Z 2009-12-14T06:34:11Z 1994 1994 Thesis http://hdl.handle.net/10356/19757 en NANYANG TECHNOLOGICAL UNIVERSITY 155 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
Chua, Ley Mui.
Modeling of submicron MOSFETs
description The Lightly Doped Drain (LDD) structure is the current-art transistor structure for fabricating submicron and deep-submicron Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). This thesis describes a simple and efficient (computer-time less intensive) model for predicting the LDD MOSFET current-voltage (I-V) characteristics.
author2 Lau, Kim Teen
author_facet Lau, Kim Teen
Chua, Ley Mui.
format Theses and Dissertations
author Chua, Ley Mui.
author_sort Chua, Ley Mui.
title Modeling of submicron MOSFETs
title_short Modeling of submicron MOSFETs
title_full Modeling of submicron MOSFETs
title_fullStr Modeling of submicron MOSFETs
title_full_unstemmed Modeling of submicron MOSFETs
title_sort modeling of submicron mosfets
publishDate 2009
url http://hdl.handle.net/10356/19757
_version_ 1772825169926029312