Low power VLSI design
Focuses on the design of a new class of circuits which can overcome the CV2f barrier faced by the conventional CMOS logic.
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2008
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Online Access: | http://hdl.handle.net/10356/2687 |
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sg-ntu-dr.10356-26872023-03-04T03:23:52Z Low power VLSI design Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Focuses on the design of a new class of circuits which can overcome the CV2f barrier faced by the conventional CMOS logic. RGM 16/97 2008-09-17T09:13:08Z 2008-09-17T09:13:08Z 2000 2000 Research Report http://hdl.handle.net/10356/2687 Nanyang Technological University application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Yeo, Kiat Seng Low power VLSI design |
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Focuses on the design of a new class of circuits which can overcome the CV2f barrier faced by the conventional CMOS logic. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Yeo, Kiat Seng |
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Research Report |
author |
Yeo, Kiat Seng |
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Yeo, Kiat Seng |
title |
Low power VLSI design |
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Low power VLSI design |
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Low power VLSI design |
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Low power VLSI design |
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Low power VLSI design |
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low power vlsi design |
publishDate |
2008 |
url |
http://hdl.handle.net/10356/2687 |
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1759857077375729664 |