Low power VLSI design
Focuses on the design of a new class of circuits which can overcome the CV2f barrier faced by the conventional CMOS logic.
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Main Author: | Yeo, Kiat Seng |
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Other Authors: | School of Electrical and Electronic Engineering |
Format: | Research Report |
Published: |
2008
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Subjects: | |
Online Access: | http://hdl.handle.net/10356/2687 |
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Institution: | Nanyang Technological University |
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