Investigation and design of built-in self-test techniques for digital logic circuits

The report emphasizes on the design of testing techniques for digital circuits.

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Bibliographic Details
Main Author:	Wong, Eddie M. C.
Other Authors:	School of Electrical and Electronic Engineering
Format:	Research Report
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:	http://hdl.handle.net/10356/2697
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-2697
record_format	dspace
spelling	sg-ntu-dr.10356-26972023-03-04T03:24:45Z Investigation and design of built-in self-test techniques for digital logic circuits Wong, Eddie M. C. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The report emphasizes on the design of testing techniques for digital circuits. RP 23/91 2008-09-17T09:13:14Z 2008-09-17T09:13:14Z 2000 2000 Research Report http://hdl.handle.net/10356/2697 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Wong, Eddie M. C. Investigation and design of built-in self-test techniques for digital logic circuits
description	The report emphasizes on the design of testing techniques for digital circuits.
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Wong, Eddie M. C.
format	Research Report
author	Wong, Eddie M. C.
author_sort	Wong, Eddie M. C.
title	Investigation and design of built-in self-test techniques for digital logic circuits
title_short	Investigation and design of built-in self-test techniques for digital logic circuits
title_full	Investigation and design of built-in self-test techniques for digital logic circuits
title_fullStr	Investigation and design of built-in self-test techniques for digital logic circuits
title_full_unstemmed	Investigation and design of built-in self-test techniques for digital logic circuits
title_sort	investigation and design of built-in self-test techniques for digital logic circuits
publishDate	2008
url	http://hdl.handle.net/10356/2697
_version_	1759857753366462464

Investigation and design of built-in self-test techniques for digital logic circuits

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