Low power CMOS circuit design using adiabatic logic
This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic.
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2008
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Online Access: | http://hdl.handle.net/10356/3114 |
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sg-ntu-dr.10356-31142023-07-04T17:52:29Z Low power CMOS circuit design using adiabatic logic Parthasarathy Srinivasa Raghavan. Lau Kim Teen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic. Master of Science (Consumer Electronics) 2008-09-17T09:22:34Z 2008-09-17T09:22:34Z 2002 2002 Thesis http://hdl.handle.net/10356/3114 Nanyang Technological University application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering Parthasarathy Srinivasa Raghavan. Low power CMOS circuit design using adiabatic logic |
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This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic. |
author2 |
Lau Kim Teen |
author_facet |
Lau Kim Teen Parthasarathy Srinivasa Raghavan. |
format |
Theses and Dissertations |
author |
Parthasarathy Srinivasa Raghavan. |
author_sort |
Parthasarathy Srinivasa Raghavan. |
title |
Low power CMOS circuit design using adiabatic logic |
title_short |
Low power CMOS circuit design using adiabatic logic |
title_full |
Low power CMOS circuit design using adiabatic logic |
title_fullStr |
Low power CMOS circuit design using adiabatic logic |
title_full_unstemmed |
Low power CMOS circuit design using adiabatic logic |
title_sort |
low power cmos circuit design using adiabatic logic |
publishDate |
2008 |
url |
http://hdl.handle.net/10356/3114 |
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1772825574512787456 |