Low power CMOS circuit design using adiabatic logic

Low power CMOS circuit design using adiabatic logic

This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic.

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Bibliographic Details
Main Author:	Parthasarathy Srinivasa Raghavan.
Other Authors:	Lau Kim Teen
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	http://hdl.handle.net/10356/3114
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	Nanyang Technological University

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