Latchup analysis of deep submicrometer CMOS devices

The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing...

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Bibliographic Details
Main Author:	Chen, Hong Lei.
Other Authors:	Yeo, Kiat Seng
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:	http://hdl.handle.net/10356/3671
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-3671
record_format	dspace
spelling	sg-ntu-dr.10356-36712023-07-04T16:38:43Z Latchup analysis of deep submicrometer CMOS devices Chen, Hong Lei. Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing the temperature conditions of the test structure. Master of Science (Microelectronics) 2008-09-17T09:34:56Z 2008-09-17T09:34:56Z 2004 2004 Thesis http://hdl.handle.net/10356/3671 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Chen, Hong Lei. Latchup analysis of deep submicrometer CMOS devices
description	The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing the temperature conditions of the test structure.
author2	Yeo, Kiat Seng
author_facet	Yeo, Kiat Seng Chen, Hong Lei.
format	Theses and Dissertations
author	Chen, Hong Lei.
author_sort	Chen, Hong Lei.
title	Latchup analysis of deep submicrometer CMOS devices
title_short	Latchup analysis of deep submicrometer CMOS devices
title_full	Latchup analysis of deep submicrometer CMOS devices
title_fullStr	Latchup analysis of deep submicrometer CMOS devices
title_full_unstemmed	Latchup analysis of deep submicrometer CMOS devices
title_sort	latchup analysis of deep submicrometer cmos devices
publishDate	2008
url	http://hdl.handle.net/10356/3671
_version_	1772829088061325312

Latchup analysis of deep submicrometer CMOS devices

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