Layout design for input/output transistors

• Main Author: Wong, David Wing Fatt.
• Other Authors: Yeo, Kiat Seng
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• Online Access: http://hdl.handle.net/10356/3757
• Institution: Nanyang Technological University

In this project, the performance of area-efficient CMOS buffers using the octagon-type and circle-type layout for both NMOS and PMOS transistors are investigated. The performance criteria include the efficient use of layout area, output driving/ sinking capability and ESD robustness.