Development and optimization of 1.2 micron CMOS process technology

152 p.

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Bibliographic Details
Main Author:	Arati Majumder
Other Authors:	Tse Man Siu
Format:	Theses and Dissertations
Published:	2010
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	http://hdl.handle.net/10356/39143
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-39143
record_format	dspace
spelling	sg-ntu-dr.10356-391432023-07-04T15:25:39Z Development and optimization of 1.2 micron CMOS process technology Arati Majumder Tse Man Siu School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering 152 p. This project was aimed to study and optimize the baseline 1.2um Twin-Well CMOS technology, keeping in view the future application of this process to the 1.2um SiGe BiCMOS technology. Master of Science (Microelectronics) 2010-05-21T04:45:40Z 2010-05-21T04:45:40Z 2007 2007 Thesis http://hdl.handle.net/10356/39143 application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering Arati Majumder Development and optimization of 1.2 micron CMOS process technology
description	152 p.
author2	Tse Man Siu
author_facet	Tse Man Siu Arati Majumder
format	Theses and Dissertations
author	Arati Majumder
author_sort	Arati Majumder
title	Development and optimization of 1.2 micron CMOS process technology
title_short	Development and optimization of 1.2 micron CMOS process technology
title_full	Development and optimization of 1.2 micron CMOS process technology
title_fullStr	Development and optimization of 1.2 micron CMOS process technology
title_full_unstemmed	Development and optimization of 1.2 micron CMOS process technology
title_sort	development and optimization of 1.2 micron cmos process technology
publishDate	2010
url	http://hdl.handle.net/10356/39143
_version_	1772825731240296448

Development and optimization of 1.2 micron CMOS process technology

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