Thermoelastic fracture mechanics analysis on electronic packaging using boundary element method

• Main Author: Kuek, Choon Han.
• Other Authors: Ang Hock Eng
• Format: Final Year Project
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Mechanical engineering::Mechanics and dynamics
• Online Access: http://hdl.handle.net/10356/40322
• Institution: Nanyang Technological University

The demand for Integrated Circuit (IC) has increased tremendously over the years and the dependence on it has become overwhelming. Its usages range from daily appliances to sophisticated micro processors. Hence, this motivates researchers to design and improve the IC constantly. The size of the IC chip mounted in the plastic packages is increased to improve its capacity and functionality. At the same time, the package thickness has been made smaller and thinner in order to accommodate a larger number of packaged chips on the Printed Circuit Board (PCB). However, these have caused the reliability of the IC to deteriorate due to the aspect ratio between the package and the IC chip. Hence, the cracking at the interface of the dissimilar materials has become an alarming issue. The Boundary Element Method was used to analyze the fracture behavior of a typical IC package under both mechanical and thermal loads. The geometries and aspect ratios of the IC package were varied and its effects on the structural integrity of the IC package were analyzed. The results show that the thickness of the resin under the chip pad plays a significant role in the fracture characteristic parameters. Under mechanical loading, thicker resin thickness under the chip pad provides better resistance to the mechanical stress. However, under thermal loading, a thinner layer of resin under the chip pad exhibit lower stress intensity factor at the crack tip. From the analysis, it is suggested that the ratio of the thickness of the resin to the chip pad should be kept at the range of 1.5 to 2.0 and the ratio of the crack size to the width of the IC package should be kept at less than 0.5. Hence, the reliability of the IC packages can be further improved with the suggested aspect ratios.